In many communication and other systems, it is often necessary to synchronize an output signal according to some timing event. Additionally, the output signal is typically generated using digital logic elements and a suitable digital-to-analog converter. Accordingly, it is then necessary to the synchronize the operation of digital logic elements to the timing event. For example, known systems that conduct cellular communications segment data according to slots, frame, and super-frames. The time between super-frames is referred to as an “epoch.” The epoch frequency is a multiple of the communication frequency and the epoch beginning must occur within an error tolerance of a defined GPS time. Accordingly, base stations typically include a clock synchronized to GPS time that generates a trigger signal at the beginning of each epoch to control communications with subscriber devices.